1. Field of the Invention
This invention relates to clock pulse generating apparatus and, more particularly, to clock pulse generating apparatus for computer systems with selective pulse delay (skew) and pulse width control. The requirement for adjusting pulse width and skew is accentuated in computer systems constructed from large scale integrated (LSI) circuitry. This is because LSI circuits have looser tolerances on device parameters than other circuit technologies. Additionally, because of the mass number of circuits which can reside on a single chip, an entire logic path may be contained on the single chip. Thus, a given path may be slow on one chip and fast on another chip, or the path may shrink a pulse on one chip and expand the pulse on another. Further, there are pulse propagation delays, due to different cable and wire lengths and pulse width variations, because of circuit delays. Hence, by incorporating the present invention into a computer system, the ease of manufacture of the computer system is greatly enhanced. This is because of the need to tune each computer system as a step in the manufacturing process, and the present invention greatly facilitates this tuning. Also, after the computer system has been in use, it may be necessary to retune it, and the present invention facilitates this retuning.
2. Description of the Prior Art
Pulse delay and pulse width adjustment is well known in the prior art. Further, the prior art teaches apparatus for selecting the amount of delay; for example, the IBM Technical Disclosure Bulletin, Volume 15, Number 1, dated June, 1972, pages 252-254, sets forth an electronically adjustable computer clocking system where the amount of pulse delay is selectable. This prior art, however, does not teach selectable pulse width control whereby skew and pulse width can be automatically adjusted. U.S. Pat. No. 3,440,546, dated Apr. 22, 1969, entitled, "Variable Period and Pulse Width Delay Lined Pulse Generating System", sets forth pulse width control. However, such pulse width control operates in a different manner, i.e., the control is on the input to the delay element. The manner for selectively varying the pulse width is thus different. In the present invention, pulse width is controlled by use of logic elements and a control register, whereas in U.S. Pat. No. 3,440,546, pulse width is controlled by the switching of a bistable device from one state to another state. In that arrangement, the resolution is pulse width cannot be as accurate as in the present invention, because the switching time of the bistable devide has an affect on the pulse width.
In general, there are other clock pulse tuning systems, such as set forth in the IBM Technical Disclosure Bulletin, Volume 18, Number 6, dated November, 1975, pages 1912-1913, entitled, "Computer Clock Distribution System With Programmable Delay and Automatic Adjustment". However, the systems do not have selective pulse width adjustment. In the present invention, different pulses from the delay element are selected, and the selected pulses are combined by logic to provide skew and pulse width adjustment.